Deep dive into Kernel

ARM Neon, VFP 가 동작하는지를 테스트하기 위한 샘플 #include #include "arm_neon.h" void add3 (uint8x16_t *data) { /* Set each sixteen values of the vector to 3. * * Remark: a 'q' suffix to intrinsics indicates * the instruction run for 128 bits registers. */ uint8x16_t three = vmovq_n_u8 (3); /* Add 3 to the value given in argument. */ *data = vaddq_u8 (*data, three);} void print_uint8 (uint8x16_t data, char* na..

GlossaryBanked registerIs a register that has multiple instances, with the instance that is in use depending on the processor mode, security state, or other processor state.IMPIs an abbreviation used in diagrams to indicate that the bit or bits concerned have implementation defined behavior.IMPLEMENTATION DEFINEDMeans that the behavior is not architecturally defined, but should be defined and do..

ACPI는 운영체제에서 device configuration 과 power management를 관리하기 위한 표준 specification ㅇ ACPI 2.0 Spec 요약 ppthttp://www.acpi.info/presentations/acpi2M0800IDF.ppt 참조:http://en.wikipedia.org/wiki/Advanced_Configuration_and_Power_Interfacehttp://www.acpi.info/presentations/ACPI_Overview.pdf P.S UEFI : Unified Extensible Firmware Interface ㅇ OS와 Firmware 간의 인터페이스를 정의ㅇ Legacy BIOS를 대체하기 위한 목적

Instruction 분류1. Branch 명령어 - B, BL, BX, BLX2. Data processing - MOV, MVN, CMP, CMN, TST, TEQ, ADD, SUB ...3. Load/Store - LDR, STR ...4. 의사 명령어 - LDR, ADR5. SWAP 명령 - SWP6. PSR 명령 (Program Status Register) - MRS, MSR7. SWI 명령 - SWI8. DCD directives9. EXPORT, IMPORT10. 덧붙임 명령어들 ^ ! S 참조:http://recipes.egloos.com/5027277http://recipes.egloos.com/5618965

CP15, control co-processor 의 역할은 processor 의 control과 status 를 관리 주요 기능ㅇ overall system control and configurationㅇ optional cache configuration and managementㅇ optional Tightly-Coupled Memory(TCM) configuration and managementㅇ optional Memory Protection Unit(MPU) configuration and managementㅇ debug accesses to the cachesㅇ system performance monitoring 참조: http://infocenter.arm.com/help/index.jsp..

Cortex-A9 에서 NSACR(Non-secure Access Control Register)는 Cortex-A9의 NEON MPE와 다른 시스템(SIMD)의 기능에 대한 접근 제어를 한다. ㅇ RW register in Secure Stateㅇ RO register in Non-secure stateㅇ only accessible in privileged mode Bits Field Function [31:19] - [18]NS_SMP Determines if the SMP bit of the ACR register writable in NS mode0 = A write to ACR in NS state takes undefined Instruction exception and the SMP bit..

# dpkg-architectureDEB_BUILD_ARCH=armhfDEB_BUILD_ARCH_BITS=32DEB_BUILD_ARCH_CPU=armDEB_BUILD_ARCH_ENDIAN=littleDEB_BUILD_ARCH_OS=linuxDEB_BUILD_GNU_CPU=armDEB_BUILD_GNU_SYSTEM=linux-gnueabihfDEB_BUILD_GNU_TYPE=arm-linux-gnueabihfDEB_BUILD_MULTIARCH=arm-linux-gnueabihfDEB_HOST_ARCH=armhfDEB_HOST_ARCH_BITS=32DEB_HOST_ARCH_CPU=armDEB_HOST_ARCH_ENDIAN=littleDEB_HOST_ARCH_OS=linuxDEB_HOST_GNU_CPU=arm..

dpkg-buildflags is a tool to retrieve compilation flags to use during build of Debian packages. The default flags are defined by the vendor but they can be extended/overriden in several ways: 설정 파일 : /etc/dpkg/buildflags.conf 현재의 buildflags 정보 : dpkg-buildflags --list root@cnode01-m:~/libvirt-1.0.6# dpkg-buildflags --listCFLAGSCPPFLAGSCXXFLAGSFFLAGSLDFLAGS 참조 : GCC optimization 옵션http://gcc.gnu...

In this chapter, we can learn ARM's basic operation with registers. On the ARM processor there are 17 registers always available in any mode and 18 registers in a privileged mode. Each mode has a set of extra registers called banked registers. When mode is changed banked registers are swapped in 예를 들어, User mode일 때 r0~r15 까지는 범용 레지스터로 사용할 수 있다. 하지만 r13, r14, r15는 특별하게 취급되기도 한다. 따라서 일반적으로 r13~r15..

In an ARM processor, every interrupt is managed by GIC(Generic Interrupt Controller). The possible interrupt sources are (1)PPI, (2)SPI, and (3)SGI : PPI (Private Peripheral Interrupt) : Every processor have its own PPIs. SPI(Shared Peripheral Interrupt) : Every processor can access SPIs. SGI(Software Generated Interrupt) : This interrupt is generated by software writing to a GICD_SGIR register...