Deep dive into Kernel

Intel VT (Lv Zheng) x86 Xen memory map (from iamroot.org)

아래 자료는 다 인터넷에서 검색한 자료 입니다. (From 단국대) X86 리눅스 부팅 과정 http://kerneldox.com/kdox-linux/dir_d9ee12b4e6cfa276a6617f3302007efc.html 리눅스 커널 분석(시각화)http://www.makelinux.net/kernel_map/ 커널 소스http://lxr.free-electrons.com/ http://www.joinc.co.kr/modules/moniwiki/wiki.php/Site/Embedded/Documents/LinuxKernelStudyForSystemenginer/index.html ARM 리눅스 부팅https://github.com/ygpark/Documentation/wiki/Booting-ARM-L..

We can rediect serial console to other device using socat. The testbed is: In this case, /dev/ttyUSB0 is redirected by socat, in Dom0 $ socat TCP4-LISTEN:54321,reuseaddr /dev/ttyUSB0,b115200,nonblock,raw,echo=0 in DomU $ socat PTY,link=/dev/vmodem0,b115200,raw,echo=0,waitslave TCP4:192.168.1.254:54321 in DomU, we can access Arndale's UART via /dev/vmodem0, using minicom

ARM Neon, VFP 가 동작하는지를 테스트하기 위한 샘플 #include #include "arm_neon.h" void add3 (uint8x16_t *data) { /* Set each sixteen values of the vector to 3. * * Remark: a 'q' suffix to intrinsics indicates * the instruction run for 128 bits registers. */ uint8x16_t three = vmovq_n_u8 (3); /* Add 3 to the value given in argument. */ *data = vaddq_u8 (*data, three);} void print_uint8 (uint8x16_t data, char* na..

GlossaryBanked registerIs a register that has multiple instances, with the instance that is in use depending on the processor mode, security state, or other processor state.IMPIs an abbreviation used in diagrams to indicate that the bit or bits concerned have implementation defined behavior.IMPLEMENTATION DEFINEDMeans that the behavior is not architecturally defined, but should be defined and do..

static void continue_new_vcpu(struct vcpu *prev){ schedule_tail(prev); if ( is_idle_vcpu(current) ) reset_stack_and_jump(idle_loop); else /* check_wakeup_from_wait(); */ reset_stack_and_jump(return_to_new_vcpu); return_to_new_vcpu -> return_to_hypervisor ENTRY(return_to_hypervisor) cpsid i ldr lr, [sp, #UREGS_lr] ldr r11, [sp, #UREGS_pc] msr ELR_hyp, r11 ldr r11, [sp, #UREGS_cpsr] msr SPSR_hyp, ..

ACPI는 운영체제에서 device configuration 과 power management를 관리하기 위한 표준 specification ㅇ ACPI 2.0 Spec 요약 ppthttp://www.acpi.info/presentations/acpi2M0800IDF.ppt 참조:http://en.wikipedia.org/wiki/Advanced_Configuration_and_Power_Interfacehttp://www.acpi.info/presentations/ACPI_Overview.pdf P.S UEFI : Unified Extensible Firmware Interface ㅇ OS와 Firmware 간의 인터페이스를 정의ㅇ Legacy BIOS를 대체하기 위한 목적

Instruction 분류1. Branch 명령어 - B, BL, BX, BLX2. Data processing - MOV, MVN, CMP, CMN, TST, TEQ, ADD, SUB ...3. Load/Store - LDR, STR ...4. 의사 명령어 - LDR, ADR5. SWAP 명령 - SWP6. PSR 명령 (Program Status Register) - MRS, MSR7. SWI 명령 - SWI8. DCD directives9. EXPORT, IMPORT10. 덧붙임 명령어들 ^ ! S 참조:http://recipes.egloos.com/5027277http://recipes.egloos.com/5618965

CP15, control co-processor 의 역할은 processor 의 control과 status 를 관리 주요 기능ㅇ overall system control and configurationㅇ optional cache configuration and managementㅇ optional Tightly-Coupled Memory(TCM) configuration and managementㅇ optional Memory Protection Unit(MPU) configuration and managementㅇ debug accesses to the cachesㅇ system performance monitoring 참조: http://infocenter.arm.com/help/index.jsp..

Cortex-A9 에서 NSACR(Non-secure Access Control Register)는 Cortex-A9의 NEON MPE와 다른 시스템(SIMD)의 기능에 대한 접근 제어를 한다. ㅇ RW register in Secure Stateㅇ RO register in Non-secure stateㅇ only accessible in privileged mode Bits Field Function [31:19] - [18]NS_SMP Determines if the SMP bit of the ACR register writable in NS mode0 = A write to ACR in NS state takes undefined Instruction exception and the SMP bit..